Two Australian companies have secured subcontracts for the design of “key subsystems for the Royal Australian Navy’s (RAN’s) 12 future Attack-class submarines, according to a 13 May announcement by the Department of Defence (DoD) in Canberra.
Minister for Defence Linda Reynolds said Safran Electronics subcontracted Adelaide-based Acacia Systems and Western-Sydney-based Thomas Global Systems for the design of the optronics search-and-attack navigation radar, and navigation data distribution systems.
An artist’s impression showing one of the Royal Australian Navy’s future Attack-class submarines.
The DoD pointed out that under the subcontracts Acacia Systems will deliver prototypes and interface simulators enabling Lockheed Martin Australia, which is the combat system integrator for the future Attack-class submarines, to conduct test activities and validate the integrated performance of the combat system in its Adelaide-based Combat System Architecture Laboratory.
Thomas Global Systems will carry out the design of processing hardware for the optronics masts, navigation radar, and navigation data distribution systems.
The minister, who emphasised that Canberra is “committed to maximising Australian industry content” in the AUD50 billion (USD32.3 billion) Future Submarine Programme, said the signing of these most recent subcontracts is a “positive next step” in that direction, “as we transition towards detailed design and the construction of the fleet”.
The latest announcement comes after Lockheed Martin Australia announced in October 2019 that it had awarded a subcontract to Safran Electronics & Defense Australasia Pty Ltd for the design of three major combat system components for the Future Submarine Programme.
Under the AUD36.77 million contract, which will be in force until May 2023, Safran will deliver the preliminary and detailed designs for the combat system’s optronics search-and-attack mast, navigation radar, and navigation data distribution components. The contract scope also includes the delivery of prototypes and interface simulators.
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